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TA84006F/FG
TOSHIBA Bipolar Linear IC Silicon Monolithic
TA84006F/FG
Three-Phase Wave Motor Driver IC
The TA84006F/FG is a three-phase wave motor driver IC. Used with a three-phase sensorless controller (TB6548F/FG or TB6537P/PG), the TA84006F/FG can provide PWM sensorless drive for three-phase brushless motors.
Features
* * * * * * Built-in voltage detector Overcurrent detector incorporated Overheating protector incorporated Multichip (MCH) structure Uses Pch-MOS for the upper output power transistor Rated at 25 V/1.0 A Package: SSOP30-P-375-1.00 Weight: 0.63 g (typ.)
Note 1: This product has a multichip (MCP) structure utilizing Pch-MOS technology. The Pch-MOS structure is sensitive to electrostatic discharge and should therefore be handled with care.
TA84006FG: The TA84006FG is Pb-free product. The following conditions apply to solderability: *Solderability 1. Use of Sn-37Pb solder bath *solder bath temperature = 230C *dipping time = 5 seconds *number of times = once *use of R-type flux 2. Use of Sn-3.0Ag-0.5Cu solder bath *solder bath temperature = 245C *dipping time = 5 seconds *number of times = once *use of R-type flux
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Block Diagram
VCC COMP N VM VZ
IN_UP IN_VP
Pin voltage detector
Pch-MOS FET x 3 IN_WP Control circuit IN_UN IN_VN IN_WN OUT_U OUT_V OUT_W Motor
Overheating protector
RF
VISD1 ISD Overcurrent detector
S_GND
P_GND
VISD2
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Pin Assignment

LV LW OUT_W LA0 LA1 PWM CW_CCW NC FG_OUT NC SEL_LAP NC XT XTin GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 WAVE OC OUT_WN OUT_WP NC OUT_VN NC OUT_VP NC OUT_UN OUT_UP VDD VM2 VZ RF1 P_GND1 NC ISD IN_WN IN_WP IN_VN IN_VP IN_UN IN_UP
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
OUT_V VM1 OUT_U Lu NC RF2 P_GND2 NC NC VISD2 VISD1 COMP N VCC S_GND
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Pin Description
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Pin Symbol LV LW OUT_W VM2 VZ RF1 P_GND1 NC ISD IN_WN IN_WP IN_VN IN_VP IN_UN IN_UP S_GND VCC N COMP VISD1 VISD2 NC NC P_GND2 RF2 NC Lu OUT_U VM1 OUT_V Pin Function V-phase output upper Pch gate pin W-phase output upper Pch gate pin W-phase output pin Motor drive power supply pin Reference voltage pin Output current detection pin Power GND pin Not connected Overcurrent detection output pin W-phase upper drive input pin W-phase lower drive input pin V-phase upper drive input pin V-phase lower drive input pin U-phase upper drive input pin U-phase lower drive input pin Signal GND pin Control power supply pin Mid-point pin Location detection signal output pin Overcurrent detection input pin 1 Overcurrent detection input pin 2 Not connected Not connected Power GND pin Output current detection pin Not connected U-phase upper output Pch gate pin U-phase output pin Motor drive power supply pin V-phase output pin Leave open. Connects motor. Externally connects to the VM2 pin. Connects the motor. VCC (opr) = 4.5 to 5.5 V Mid-point potential confirmation pin; left open Connects to the WAVE pin of the TB6548F/FG (or TB6537P/PG/F/FG). Externally connects to the RF2 pin. Connect a capacitor between this pin and GND. Internal resistor and capacitor used to reduce noise. Externally connects to the P_GND1 pin. Externally connects to the RF1 pin. Connect a detection resistor between this pin and GND. Leave open. Leave open. Connects motor. Externally connects to VM1. Used for the VM drop circuit reference voltage when VM (max) > 22 V. = Left open when VM (max) < 22 V. = Externally connected to RF2. (Connect a detection resistor between this pin and GND.) Externally connects to P_GND2. Inputs the inversion of the ISD pin output to the OC pin of the TB6548F/FG (or TB6537P/PG/F/FG). Connects to the OUT_WN pin of the TB6548F/FG (or TB6537P/PGF/FG); incorporates pull-down resistor. Connects to the OUT_WP pin of the TB6548F/FG (or TB6537P/PG/F/FG); incorporates pull-up resistor. Connects to the OUT_VN pin of the TB6548F/FG (or TB6537P/PG/F/FG); incorporates pull-down resistor. Connects to the OUT_VP pin of the TB6548F/FG (or TB6537P/PG/F/FG); incorporates pull-up resistor. Connects to the OUT_UN pin of the TB6548F/FG (or TB6537P/PG/F/FG); incorporates pull-down resistor. Connects to the OUT_UP pin of the TB6548F/FG (or TB6537P/PG/F/FG); incorporates pull-up resistor. Remarks
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Absolute Maximum Ratings (Ta = 25C)
Characteristic Motor power supply voltage Control power supply voltage Output current Input voltage Symbol VM VCC IO VIN Pd 1.4 (Note 3) Operating temperature Storage temperature Topr Tstg -30~85 -55~150 C C Rating 25 7 1.0 GND - 0.3 ~VCC + 0.3 V 1.1 (Note 2) Power dissipation W Unit V V A/phase V
Note 2: Standalone Note 3: When mounted on a PCB (50 x 50 x 1.6 mm; Cu area, 30%)
Recommended Operating Conditions (Ta = -30~85C)
Characteristic Control power supply voltage Motor power supply voltage Output current Input voltage Chopping frequency Vz current Symbol VCC VM IO VIN fchop IZ Test Circuit Test Conditions Min 4.5 10 GND 15 Typ. 5.0 20 20 Max 5.5 22 0.5 VCC 50 1.0 Unit V V A V kHz mA
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Electrical Characteristics (Ta = 25C, VCC = 5 V, VM = 20 V)
Characteristic Symbol Test Circuit 1 IN_UN, IN_VN, IN_WN 1 2 VIN = 5 V, IN_UP, IN_VP, IN_WP 2 VIN = 5V, IN_UN, IN_VN, IN_WN 2 VIN = GND, IN_UN, IN_VN, IN_WN 2 VIN = GND, IN_UP, IN_VP, IN_WP 3 Upper phase 1 ON, lower phase 1 ON, output open Upper phase 2 ON, synchronous regeneration mode, output open All phases OFF, output open Upper phase 1 ON, lower phase 1 ON, output open Upper phase 2 ON, synchronous regeneration mode, output open All phases OFF, output open IO = 0.5 A IO = 0.5 A, bi-directional IF = 0.5 A IF = 0.5 A VM = 20 V Mid-point voltage VN 8 VRF = 0 V VM = 20 V Pin voltage detection level VCMP VOL (CMP) Pin voltage detection output voltage ROH (CMP) Overcurrent detection level Overcurrent detection output voltage VOL (ISD) Reference voltage TSD temperature TSD hysteresis width Output leakage current VZ TSD T IL (H) IL (L) 10 11 12 13 Pch-MOS VRF VOH (ISD) 9 10 10 IOH = 0.1 mA IOL = 0.1 mA IZ = 0.5 mA, Tj = 25C Tj 9 9 VRF = 0 V IOL = 1 mA 9.88 GND 7 0.45 4.5 GND 20.9 10.4 10 0.5 22.0 165 30 0 0 10.92 0.5 13 0.55 5.0 0.5 23.1 100 50 V V k V V V V C C A 9.88 10.4 10.92 V 8.0 13.0 300 450 600 1 300 450 600 A GND 0.8 20 Test Conditions IN_UP, IN_VP, IV_WP Input voltage VIN (H) VIN (L) IIN1 (H) 2.5 Min Typ. Max Unit
5.0
V
IIN2 (H) Input current IIN1 (L)
IIN2 (L) ICC1
ICC2 ICC3 IM1
3 3 3
7.0 6.0 2.0
12.0 11.0 mA 3.5
Power supply current
IM2 IM3 Lower output saturation voltage Upper output ON-resistance Lower diode forward voltage Upper diode forward voltage VSAT Ron VF (L) VF (H)
3 3 4 5 6 7
2.0 1.8 1.0 0.65 1.2 0.9
3.5 3.2 1.5 1.0 1.6 1.4 V V V
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Functions
Input IN-P High Low High Low IN-N High High Low Low Upper Power Transistor ON ON OFF OFF Output Lower Power Transistor OFF ON OFF ON High Prohibit mode High impedance Low (Note 4)
Connecting the TB6548F/FG (or TB6537P/PG/F/FG) to the TA84006F/FG allows electric motors to be controlled by PWM. Note 4: In Prohibit Mode, the output power transistor goes into vertical ON mode and through current may damage the circuit. Do not use the TA84006F/FG in this mode. This mode is not actuated when the TA84006F/FG is connected to the TB6548F/FG or TB6537P/PG/F/FG, but can be triggered by input noise during standalone testing.

VM
OUT-P Low active TB6548F/FG (TB6537P/ PG/F/FG)
IN-P
OUT

Connecting the TA84006F/FG to the TB6537P/PG/F/FG controls the lower PWM. At chopping ON, the diagonally output power transistors are ON. At chopping OFF, the lower transistor is OFF, regenerating the motor current via the upper diode (incorporating the Pch-MOS).
OUT-N High active ON Pch-MOS
IN-N VM OFF VOUT When chopping is ON When chopping is OFF
OFF
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Connecting the TA84006F/FG to the TB6548F/FG controls the synchronous rectification PWM. At chopping OFF, power dissipation is reduced by operating the Pch-MOS in reverse and regenerating the motor's current.
VM ON Pch-MOS VOUT OFF When chopping is ON When chopping is OFF

When controlling synchronous rectification PWM
IN-P
IN-N
VOUT
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Equivalent Circuit

* * * Input to the VISD1 pin the voltage generated at the overcurrent detection resistor RF connected to the RF pin. At chopping ON, voltage spikes at the RF pin as a result of the Pch-MOS output capacitance. To cancel the spike, externally connect a capacitor to the VISD2 pin. (10 k resistor built-in) If the VISD2 pin voltage exceeds the internal reference voltage (VRF = 0.5 V), the overcurrent detection output ISD pin goes Low. Inputting the inversion of the ISD pin output to the TB6537P/PG/F/FG or TB6548F/FG OC pin limits the PWM ON time and the current at the ISD output rising edge.
VCC VISD1 10 k VISD2 ISD External capacitor 0.5 V (typ.)

* The pin voltage detector outputs the result of OR-ing the output pin voltages and the virtual mid-point N voltage to determine the majority. (If at least two phases of the three-phase output are greater than the mid-point potential, the detector outputs "Low". Conversely, if at least two phases are smaller than the mid-point potential, the circuit outputs "High".)
VCC
10 k (typ.)
Majority-determining OR data
COMP
GND
*
With the virtual mid-point potential VN used as the reference for the pin voltage detection circuit considered as half the voltage applied to the motor, then VN = [ (VM - Ron (upper) *IO) - (Vsat (lower) + VRF) ]/2 + Vsat + VRF = [VM - VRF + Vsat (lower) - Ron (upper) *IO]/2 + VRF. Here, assuming that: Vsat (lower) - Ron (upper) *IO VF, - we have set the following: VN = [VM - VRF + VF]/2 + VRF

* * Automatic restoration Temperature hysteresis supported TSD (ON) = 165C TSD (HYS) = 30C TSD (OFF) = 135C
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* Incorporate a Zener diode and make the external connections shown in the diagram below. Design the device so that the voltage applied to the VM is clamped at 22 V below the maximum operating power supply voltage. A capacitor is needed to control the effect of the counter-electromotive force. Verification is particularly necessary when the motor current is large at startup or at shutdown (output OFF). 24 V Vz pin fluctuation width 20.9 V to 23.1 V Due to the temperature characteristics (3.5 x 3 mV/C), the following applies at an ambient temperature of 85C: VZ Vz (max) = 23.1 + (85 - 25) x 3.5 x 3 mV = 23.73 V By taking the measures shown in the diagram on the right to bring the voltage down to 22 V, the following becomes the case: Vz (max) = 23.73 - (0.7 - 2 mV x (85 - 25) ) x 3 = 21.99 V
*
VM
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Example of Application Circuit
VDD = 5 V VM = 20 V
Location detection signal WAVE PWM signal COMP
M TB6548F/FG TA84006F/FG
RF VISD1 OC GND Overcurrent detection signal ISD S_GND P_GND VISD2
0.01 F
Note 5:
Utmost care is necessary in the design of the output, VCC, VM, and GND lines since the IC may be destroyed by short-circuiting between outputs, air contamination faults, or faults due to improper grounding, or by short-circuiting between contiguous pins.
1
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Test Circuit 1: VIN (H), VIN (L)
20 V 17 1 2 27 4 29 19 10 11 12 13 14 15 TA84006F/FG 28 18 5V
500
30 3 V 6 25 V V
2.5 V
0.8 V
16
7
24
9
20
21
Input VIN = 0.8 V/2.5 V, measure the output voltage, and test the function.
Test Circuit 2: IIN (H), IIN (L)
17
1 2 27
4 29 19
10 11 12 13 14 15 TA84006F/FG
18
28
30 3 6 25
A 5V
A 16 7 24 9 20 21
20 V
5V
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Test Circuit 3: ICC1, ICC2, ICC3, IM1, IM2, IM3
ICC 5V A 17 1 2 27 4 29 19 10 11 12 13 14 15 TA84006F/FG 28 18 A IM 20 V 30 3 6 25 2.5 V 0.8 V 16 7 24 9 20 21 19 10 11 12 13 14 15 TA84006F/FG 28 18 30 3 Vsat V 6 25 16 7 24 9 20 21 20 V 17 1 2 27 4 29
ICC1, IM1: upper phase 1 ON, lower phase 1 ON (e.g., U-phase: H; V-phase: L; W-phase: Z) ICC2, IM2: upper phase 1 ON, synchronous regeneration mode (e.g., U-phase: H; V-phase: H; W-phase: Z) ICC3, IM3: all phases OFF
Test Circuit 4: Vsat
5V
0.5 A
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Test Circuit 5: Ron
17
1 2 27
4 29 19 V1 V 0.5 A Ron = V1/0.5 3 6 25 0.5 A
10 11 12 13 14 15 TA84006F/FG
18
28
30
Test Circuit 6: VF (L)
17 1 2 27 4 29 19 10 11 12 13 14 15 TA84006F/FG 28 18
5V
16
7
24
9
20
21
30 3 VF V 6 25
16
7
24
9
20
21
14
20 V
5V
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Test Circuit 7: VF (H)
17
1 2 27
4 29 19 VF V 0.5 A
10 11 12 13 14 15 TA84006F/FG
18
28
30 3 6 25
16
7
24
9
20
21
Test Circuit 8: VN
20 V 17 1 2 27 4 29 19 10 11 12 13 14 15 TA84006F/FG 28 VN V 30 3 6 25 16 7 24 9 20 21 18
5V
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Test Circuit 9: VCMP, VOL (CMP), ROH (CMP)
20 V 17 1 2 27 4 29 19 10 11 12 13 14 15 TA84006F/FG 28 18 SW1 V V2 A B 10 k 30 3 6 25 5V 16 7 24 9 20 21 10.92 V 0.1 mA 5V 0.55 V 9.88 V 19 10 11 12 13 14 15 TA84006F/FG 28 18 30 3 6 25 16 7 24 9 20 21 SW2 B V V3 A 0.45 V 0.1 mA 20 V 17 1 2 27 4 29 5V
(1) (2)
Where output phase 2 is High (10.92 V) and phase 1 is Low (= 9.88 V), set SW1 = A and measure V2 = VOL (CMP). Where output phase 1 is High (10.92 V) and phase 2 is Low (9.88 V), set SW1 = B and confirm that 5 V x 10 k/(10 k + 13 k) < V2 < 5 V x 10 k/(10 k + 7 k).
Test Circuit 10: VRF, VOH (ISD), VOL (ISD)
5V
(1) (2)
Where VISD = 0.55 V, set SW2 = A and measure V3 = VOH (ISD). Where VISD = 0.45 V, set SW2 = B and measure V3 = VOL (ISD).
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Test Circuit 11: VZ
V
VZ
0.5 mA
17
1 2 27 5
4 29 19
10 11 12 13 14 15 TA84006F/FG
18
28
30 3 6 25
16
7
24
9
20
21
Test Circuit 12: IL (H)
25 V 17 1 2 27 4 29 19 10 11 12 13 14 15 TA84006F/FG 28 18 Connect N pin to -0.3 V 30 3 A 6 25 5V 16 7 24 9 20 21
5V
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Test Circuit Test Circuit 13: IL (L)
17
1 2 27
4 29 19
10 11 12 13 14 15 TA84006F/FG
18 A 28
30 3 6 25
5V
16
7
24
9
20
21
25 V
5V
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Package Dimensions
Weight: 0.63 g (typ.)
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Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. Timing charts may be simplified for explanatory purposes. The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required, especially at the mass production design stage. Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. Components in the test circuits are used only to obtain and confirm the device characteristics. These components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
2. Equivalent Circuits
3. Timing Charts
4. Application Circuits
5. Test Circuits
IC Usage Considerations
Notes on handling of ICs
[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. [2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. [3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or ignition. Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition. [4] Do not insert devices in the wrong orientation or incorrectly. Make sure that the positive and negative terminals of power supplies are connected properly. Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. In addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time.
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Points to remember on handling of ICs
(1) Thermal Shutdown Circuit Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown circuits operate against the over temperature, clear the heat generation status immediately. Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the thermal shutdown circuit to not operate properly or IC breakdown before operation. (2) Heat Radiation Design In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (TJ) at any time and condition. These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into considerate the effect of IC heat radiation with peripheral components. (3) Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor's power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device's motor power supply and output pins might be exposed to conditions beyond maximum ratings. To avoid this problem, take the effect of back-EMF into consideration in system design.
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